[fpga-miniconf] Final Reminder of FPGA Miniconf prework and other notes....

Ryan Thomas ryan at ryant.org
Tue Jan 23 09:52:06 AEDT 2018


I had this working last week, but today I decided to update and rebuild it
with the new litex commits.

Now after *make gateware; make image; scripts/build-qemu.sh* I get the
following:

Booting from network...
Local IP : 192.168.100.50
Remote IP: 192.168.100.100
Fetching from: UDP/6069

And it just sits there, with the qemu-system-or32 process at 100%.

Any help / ideas for how to rectify this?

Cheers,

Ryan

On 23 January 2018 at 00:42, Bing Chen <Libing.Chen at uts.edu.au> wrote:

> Hi Jim, Rohit,
>
> After a 'make clean' and re-make I finally got the buildroot login, thanks
> for the help!
>
> Regards
> Bing
> Sent from my Samsung Galaxy smartphone.
>
>
> -------- Original message --------
> From: Jim Mussared <jim.mussared at gmail.com>
> Date: 22/1/18 8:18 pm (GMT+10:00)
> To: Rohit Kumar Singh <rohit91.2008 at gmail.com>
> Cc: Bing Chen <Libing.Chen at uts.edu.au>, fpga-miniconf at lists.lca2018.
> linux.org.au, me at mith.ro
> Subject: Re: [fpga-miniconf] Final Reminder of FPGA Miniconf prework and
> other notes....
>
> Rather than recloning the whole repo, it shpuld be sufficient just to git
> pull in litex-buildenv, then make gateware / make image (make gateware
> should update all the submodules, including litex, which is what Florent is
> referring to).
>
> Unless I missed something, doesn't look like you made a new gateware since
> doing a pull (just reflashed the old one)
>
> On 22 Jan. 2018 7:25 pm, "Rohit Kumar Singh" <rohit91.2008 at gmail.com>
> wrote:
>
>> Hi Bing!
>>
>> Sorry for repeat mail! I forgot to cc the mailing list in the last reply.
>>
>> I'm guessing your litex/litex-buildenv still might old. Because here is
>> what I get:
>>
>> LiteX SoC BIOS (or1k)
>>> (c) Copyright 2012-2018 Enjoy-Digital
>>> (c) Copyright 2007-2018 M-Labs Limited
>>> Built *Jan 20* 2018 22:57:55
>>
>>
>>  Cloning a new repo and building the gateware and image again should
>> work. Ideally, make clean, and git pull should have been sufficient.
>>
>> Thanks & Regards,
>> Rohit
>>
>> On Mon, Jan 22, 2018 at 6:58 PM, Bing Chen <Libing.Chen at uts.edu.au>
>> wrote:
>>
>>> Hi Florent,
>>>
>>> Thanks for reply, I did another git pull in litex-buildenv and ran the
>>> download-env.sh again, still the same error when I tried:
>>>
>>> --- console msg copy ---
>>>
>>> chmod -x firmware.bin
>>> python -m litex.soc.tools.mkmscimg -f firmware.bin -o firmware.fbi
>>> make[1]: Leaving directory '/home/bing/litex-
>>> buildenv/build/arty_net_or1k.linux/software/firmware'
>>>
>>> real0m1.946s
>>> user0m2.593s
>>> sys0m0.413s
>>> flterm --port=/dev/ttyUSB1 --
>>> kernel=build/arty_net_or1k.linux//software/linux/firmware.bin --
>>> speed=115200
>>> [FLTERM] Starting...
>>>
>>> LiteX SoC BIOS (or1k)
>>> (c) Copyright 2012-2017 Enjoy-Digital
>>> (c) Copyright 2007-2017 M-Labs Limited
>>> Built Jan 12 2018 04:46:47
>>>
>>> BIOS CRC passed (046476c5)
>>> Initializing SDRAM...
>>> Read delays: 1:32-33  0:32-33  completed
>>> Memtest bus failed: 64/256 errors
>>> Memtest data failed: 524288/524288 errors
>>> Memtest addr failed: 8191/8192 errors
>>> Memory initialization failed
>>> BIOS>
>>> ---
>>>
>>> All the prework steps work fine on my box though.
>>>
>>> Regards
>>> bing
>>>
>>> On Mon, 2018-01-22 at 08:00 +0100, Florent Kermarrec wrote:
>>> > Hi Bing,
>>> >
>>> > the fact that you see "Read delays: 1:32-33  0:32-33  completed" make
>>> > me think your are not up to date on both litex and litex-buildenv
>>> > repository. (or maybe on just one of them)
>>> >
>>> > Can you check?
>>> >
>>> > Florent
>>> >
>>> >
>>> > 2018-01-22 7:43 GMT+01:00 Bing Chen <Libing.Chen at uts.edu.au>:
>>> > > Hi Joel/Tim,
>>> > >
>>> > > Bing's here, I think my kit is faulty or something, when I tried
>>> > > testing loading gateware on it, I got this error msgs:
>>> > >
>>> > > --- console msg copy ---
>>> > >
>>> > > make[1]: Leaving directory '/home/bing/litex-
>>> > > buildenv/build/arty_net_or1k.linux/software/firmware'
>>> > >
>>> > > real0m1.135s
>>> > > user0m1.046s
>>> > > sys0m0.096s
>>> > > flterm --port=/dev/ttyUSB1 --
>>> > > kernel=build/arty_net_or1k.linux//software/firmware/firmware.bin --
>>> > > speed=115200
>>> > > [FLTERM] Starting...
>>> > >
>>> > > LiteX SoC BIOS (or1k)
>>> > > (c) Copyright 2012-2017 Enjoy-Digital
>>> > > (c) Copyright 2007-2017 M-Labs Limited
>>> > > Built Jan 12 2018 04:46:47
>>> > >
>>> > > BIOS CRC passed (046476c5)
>>> > > Initializing SDRAM...
>>> > > Read delays: 1:32-33  0:32-33  completed
>>> > > Memtest bus failed: 64/256 errors
>>> > > Memtest data failed: 524288/524288 errors
>>> > > Memtest addr failed: 8191/8192 errors
>>> > > Memory initialization failed
>>> > > BIOS>
>>> > >
>>> > > ----
>>> > >
>>> > > Then I tried run serialboot and it stuck at "Executing booted
>>> > > program
>>> > > at 0x40000000"
>>> > >
>>> > > ---- console msg copy ----
>>> > >
>>> > > BIOS> serialboot
>>> > > Booting from serial...
>>> > > Press Q or ESC to abort boot completely.
>>> > > sL5DdSMmkekro
>>> > > [FLTERM] Received firmware download request from the device.
>>> > > [FLTERM] Uploading kernel (74672 bytes)...
>>> > > [FLTERM] Upload complete (7.7KB/s).
>>> > > [FLTERM] Booting the device.
>>> > > [FLTERM] Done.
>>> > > Executing booted program at 0x40000000
>>> > >
>>> > > ----
>>> > >
>>> > >
>>> > > Regards
>>> > > bing
>>> > >
>>> > > On Sun, 2018-01-21 at 21:19 -0600, joel.stan at gmail.com wrote:
>>> > > > I will be at the top of the stairs at 3pm with the kits. I'm in a
>>> > > > blue tshirt. Come say hi and grab your kit.
>>> > > >
>>> > > > Cheers,
>>> > > >
>>> > > > Joel
>>> > > >
>>> > > >
>>> > > > On 22 Jan. 2018 13:14, "Jason Ball" <jason at ball.net> wrote:
>>> > > > > For that matter, could I drop in later today to grab the kit so
>>> > > I'm
>>> > > > > ready for tomorrow's session, latest changes and all.
>>> > > > >
>>> > > > > Thanks.
>>> > > > >
>>> > > > > On Mon, Jan 22, 2018 at 12:45 PM, Hal Ashburner <hal.ashburner@
>>> > > gmai
>>> > > > > l.com> wrote:
>>> > > > > > Hey guys. Where are you set up today?
>>> > > > > >
>>> > > > > > On 21 Jan. 2018 7:09 pm, "Tim 'mithro' Ansell" <me at mith.ro>
>>> > > > > > wrote:
>>> > > > > > > Hello everyone,
>>> > > > > > >
>>> > > > > > > With just over 24 hours until the FPGA Miniconf, this is
>>> > > the
>>> > > > > > > final reminder that everyone **must** complete the prework
>>> > > at h
>>> > > > > > > ttp://j.mp/pre-fpga-lca2018
>>> > > > > > >
>>> > > > > > > You must complete up to the paragraph which says the
>>> > > following
>>> > > > > > > in bright red;
>>> > > > > > > > The instructions from here can only be done after you
>>> > > receive
>>> > > > > > > > hardware. You can stop here if completing the prework.
>>> > > > > > >
>>> > > > > > > If you have not completed the prework you will not be able
>>> > > to
>>> > > > > > > attend -- that includes observing or anything similar.
>>> > > > > > >
>>> > > > > > > If you are stuck, on Monday, 22 Jan 2018, FPGA Miniconf
>>> > > helpers
>>> > > > > > > will be available to help. They should be available during
>>> > > > > > > morning tea, lunch and afternoon tea somewhere near the
>>> > > Tomu
>>> > > > > > > test station. Hopefully they will be able to solve any
>>> > > issues
>>> > > > > > > you are having.
>>> > > > > > >
>>> > > > > > > There will also be an opportunity to pick up the hardware
>>> > > kits
>>> > > > > > > during lunch at the same location. This will allow you to
>>> > > get a
>>> > > > > > > head start on setup we need to do at the start of the
>>> > > Miniconf.
>>> > > > > > >
>>> > > > > > > It would be a good for everyone to update their litex-
>>> > > buildenv
>>> > > > > > > sometime Monday evening -- there have been a large number
>>> > > of
>>> > > > > > > updates since the last email was sent out. This can be done
>>> > > by
>>> > > > > > > doing the following and then following the prework
>>> > > instructions
>>> > > > > > > for testing QEmu / Linux.
>>> > > > > > > > cd litex-buildenv
>>> > > > > > > > git pull
>>> > > > > > > > export CPU=or1k PLATFORM=arty TARGET=net
>>> > > > > > > > ./scripts/download-env.sh
>>> > > > > > > > source ./scripts/enter-env.sh
>>> > > > > > >
>>> > > > > > > Depending on internet speeds, updating should only take 10-
>>> > > 15
>>> > > > > > > minutes.
>>> > > > > > >
>>> > > > > > > People are also reminded that the FPGA Miniconf is on
>>> > > Tuesday,
>>> > > > > > > 23 January 2018 and will be starting at 10:15AM. This is
>>> > > right
>>> > > > > > > after the Matthew Todd's keynote talk. Please make sure you
>>> > > > > > > make a beeline from the keynote venue to Large POD Room
>>> > > > > > > CB11.04.400 when the keynote finishes. Please see the
>>> > > schedule
>>> > > > > > > email for the full details.
>>> > > > > > >
>>> > > > > > > Look forward to seeing everyone on Tuesday!
>>> > > > > > >
>>> > > > > > > Tim 'mithro' Ansell
>>> > > > > > >
>>> > > > > > > --
>>> > > > > > > fpga-miniconf mailing list
>>> > > > > > > fpga-miniconf at lists.lca2018.linux.org.au
>>> > > > > > > http://lists.lca2018.linux.org.au/mailman/listinfo/fpga-min
>>> > > icon
>>> > > > > > > f
>>> > > > > > >
>>> > > > > >
>>> > > > > > --
>>> > > > > > fpga-miniconf mailing list
>>> > > > > > fpga-miniconf at lists.lca2018.linux.org.au
>>> > > > > > http://lists.lca2018.linux.org.au/mailman/listinfo/fpga-minic
>>> > > onf
>>> > > > > >
>>> > > > >
>>> > > > >
>>> > > > >
>>> > > > > --
>>> > > > > --
>>> > > > > Teach your kids Science, or somebody else will :/
>>> > > > >
>>> > > > > jason at ball.net
>>> > > > > vk2vjb at google.com
>>> > > > > callsign: vk2vjb
>>> > > > >
>>> > > > >
>>> > > > > --
>>> > > > > fpga-miniconf mailing list
>>> > > > > fpga-miniconf at lists.lca2018.linux.org.au
>>> > > > > http://lists.lca2018.linux.org.au/mailman/listinfo/fpga-minicon
>>> > > f
>>> > > > >
>>> > > >
>>> > > >
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>>
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